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Autopilot HW 3

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As a software person, I always found the EAP/FSP distinction with 4 vs 8 cameras (original AP2 marketing) very strange.

The distinction being "major highway" vs. "surface streets" is much clearer to me. /shrug

I understand Tesla has not claimed this, its just an assumption, I'm just stating an opinion.

(note "major" highway just being "limited access" or w/e)
 
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As a software person, I always found the EAP/FSP distinction with 4 vs 8 cameras (original AP2 marketing) very strange.

The distinction being "major highway" vs. "surface streets" is much clearer to me. /shrug

I understand Tesla has not claimed this, its just an assumption, I'm just stating an opinion.

(note "major" highway just being "limited access" or w/e)

The marketing is still the same regarding camera count (on the order page). Also has a graphic showing all the sensors.

I think the 4 additional cameras needed for FSD are:
1 in front : redundancy and extra detection ability
1 in rear: for reversing maneuvers
2 in B pillar: for looking around corners/ cross traffic/ curbs

EAP uses 2 front and the 2 fender rear looking cameras for adjacent/ overtaking vehicles.

EAP is a forward only mode with limited non parallel vectors of obstacles. FSD is a threat from anywhere and move in any direction system.
 
Relevant:

Tesla aims for new neural net computer in production in 6 months, results in 500-2000% increase in ops/sec, says Elon Musk

There will indeed be new hardware required for FSD, and those that prepaid for it will be upgraded:

Every owner who ordered the Full Self-Driving Capability Package, which has been available (to order) since October 2016, will receive the upgrade. The package has cost between $3,000 and $5,000 over the years.

Back in June, Tesla increased the price of its ‘Full Self-Driving Capability’ package over-the-air update.

In order to get the package, buyers need to have the ‘Enhanced Autopilot’ package, which costs $5,000 when ordering the vehicle and $6,000 if buying later through an over-the-air update.

Once you have this package, the ‘Full Self-Driving Capability’ costs $3,000 when ordering and it used to cost $4,000 when buying over-the-air later until Tesla increased the price to $5,000 in June.

Tesla told Electrek that they will honor the original price for existing owners who didn’t buy the package thinking that they could later upgrade over-the-air for $4,000, but it has yet to fix the issue for many buyers.
 
@Fact Checking and I were discussing AP HW in the TSLA Market Action thread and it was not appreciated. This seems like a reasonable location, so dragging the conversation here ...


Does performance differ at the exact same frequencies, or is it the top frequency that is variable between the parts?

NVIDIA is advertising these boards with a fixed "boost clock" max frequency, so I have trouble seeing how some parts could miss hitting that frequency, without them being returned as defective. Must be missing something...

Also, even many of the high end cards tend to be air cooled, while Tesla's chips are liquid cooled, which is a lot more efficient. There's some water cooled variants available:


but it's not typical.

Boost / turbo speeds on pretty much all modern hardware (GPUs and CPUs) are not guaranteed and are best effort, not just due to thermal and power limits but silicon quality. Base clocks are really the only thing guaranteed (and sometimes they're not even advertised - it's not unusual for the "up to X" be the only thing mentioned on the box / PR).

Here is a reference to how different identical GPUs, as an example, can have a performance variance (the timestamp is 17m20s in case the link doesn't go directly there). That's why I was saying it's unlikely they'll assume they can use maximum rated boost speed on either the Pascal GP106 GPU or the Pascal iGPU in the Parker SoCs. They'll figure out what they can reliably get across most samples, and probably do a burn in test to ensure it (and reject the few that don't make it), so that's another few % loss on theoretical peak performance.

I expect the NN hardware will be designed for a given speed, and only that speed, no base vs boost clocks, and anything that fails at that speed is outright rejected, possibly before it's even packaged. That will give them the guaranteed performance they'll want without variance.
 
@Fact Checking and I were discussing AP HW in the TSLA Market Action thread and it was not appreciated. This seems like a reasonable location, so dragging the conversation here ...




Boost / turbo speeds on pretty much all modern hardware (GPUs and CPUs) are not guaranteed and are best effort, not just due to thermal and power limits but silicon quality. Base clocks are really the only thing guaranteed (and sometimes they're not even advertised - it's not unusual for the "up to X" be the only thing mentioned on the box / PR).

Here is a reference to how different identical GPUs, as an example, can have a performance variance (the timestamp is 17m20s in case the link doesn't go directly there). That's why I was saying it's unlikely they'll assume they can use maximum rated boost speed on either the Pascal GP106 GPU or the Pascal iGPU in the Parker SoCs. They'll figure out what they can reliably get across most samples, and probably do a burn in test to ensure it (and reject the few that don't make it), so that's another few % loss on theoretical peak performance.

I expect the NN hardware will be designed for a given speed, and only that speed, no base vs boost clocks, and anything that fails at that speed is outright rejected, possibly before it's even packaged. That will give them the guaranteed performance they'll want without variance.

I agree that it would make sense for the chip to be fixed clock. Variable clock rates introduce all kinds of complexity and are mainly useful in situations where the job mix includes some stuff that doesn't parallelize well and thus needs to be run at high clock rate on a subset of the silicon. Modern general purpose processors can make use of this, but an NN processor has different needs.

NN processing is deterministic and embarrassingly parallel and the job mix is narrow. Rather than go to high clock rate it is usually going to make sense to just go to more silicon area, drop the clock rate, and increase the yield. That gives you higher performance at lower system cost and with less project risk. Power consumption and heat dissipation drop with the square of the clock rate so bigger and slower silicon also eases the thermal design and power supply constraints. For this reason you'll probably see the NN silicon from Tesla come in under 1GHz, depending on the process they use - I'd guess 20nm to 28nm right now, but we may never know.
 
I agree that it would make sense for the chip to be fixed clock. Variable clock rates introduce all kinds of complexity and are mainly useful in situations where the job mix includes some stuff that doesn't parallelize well and thus needs to be run at high clock rate on a subset of the silicon. Modern general purpose processors can make use of this, but an NN processor has different needs.

NN processing is deterministic and embarrassingly parallel and the job mix is narrow. Rather than go to high clock rate it is usually going to make sense to just go to more silicon area, drop the clock rate, and increase the yield. That gives you higher performance at lower system cost and with less project risk. Power consumption and heat dissipation drop with the square of the clock rate so bigger and slower silicon also eases the thermal design and power supply constraints. For this reason you'll probably see the NN silicon from Tesla come in under 1GHz, depending on the process they use - I'd guess 20nm to 28nm right now, but we may never know.
They could probably get by fine on an older process, but if the rumor that they're fabbing in Samsung Austin is true, then it's probably at 14nm as that appears to be the only node in use there.
 
Agree the NN in a fixed time calculation (final driving logic maybe slightly variable due to conditionals, but is the minor fraction of the processing).


Power consumption and heat dissipation drop with the square of the clock rate so bigger and slower silicon also eases the thermal design and power supply constraints.

One point of clarification: power dissipation is linear with clock speed and the square of voltage (ignoring voltage vs clock speed relationship) . Parasitic capacitance energy increases as the square of voltage, and number of charge events increases linearly with frequency.
 
Agree the NN in a fixed time calculation (final driving logic maybe slightly variable due to conditionals, but is the minor fraction of the processing).

One point of clarification: power dissipation is linear with clock speed and the square of voltage (ignoring voltage vs clock speed relationship) . Parasitic capacitance energy increases as the square of voltage, and number of charge events increases linearly with frequency.

Hahaha. Whenever I speak precisely I get "this sounds awesome, but I don't know what it means". Whenever I speak generally I get corrected.

Broad audience here.
 
Hahaha. Whenever I speak precisely I get "this sounds awesome, but I don't know what it means". Whenever I speak generally I get corrected.

Broad audience here.

Makes sense though. Most, if not all, tech based or tech oriented people will be interested in a Tesla because of the software/hardware. Non-tech people will want to know more about the software/hardware because Tesla's "marketing" (whether inherent or third party) always keeps talking about software+hardware driving the car leading to a natural curiosity. Conversation too deep and you lose the latter and too general and you lose the former. ¯\_(ツ)_/¯
 
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