Knightshade
Well-Known Member
You did ask “ Though even if we pretended he DID say what you misheard- what evidence do you have 3x compute wouldn't be sufficient?”
I think he was responding to this
Yes, but then didn't really provide any evidence just more guessing and bad math.
For example:
"If we assume that hardware four is 3x more capable compute wise then that means it is 50% more capable when compared against two nodes of hw3. "
That's flat out wrong.
Because what Tesla is currently doing (having to cross-core the code) is a major hit to efficiency....(As Green and others have remarked upon in the past). So HW3s total usable compute when doing this is not Core 1 total compute + Core 2 total compute.
Then he tells us:
"You need at least 100% more capable to create true hardware redundancy.""
Which is, again, baseless and bad math.
Currently we know the system spec was given as 144 TOPS-- this is based on each sides NN chips doing 72 TOPS, with the intent being each core ran independently and redundantly.
But 72 TOPs was not enough so they had to start sending stuff cross-core- with the big hit to efficiency.
3x total compute would mean HW4 has 216 TOPS per core. Which is 50% more per core than both cores combined on HW3.
Given the current system today runs in some significant amount less compute than 144 TOPs (we don't know how much less... dunno if @verygreen can tell us?) and also has not been optimized for anything yet-- where is the evidence that 216 TOPS per core is "not enough" to run it with redundancy?
And again all of THAT is based on his already wrong assumption from mishearing what Elon was talking about with 3x-- he was discussing safety- not compute.
If we instead apply Moores law, with there being at least two 18 month doublings since HW3 (and really it'll be longer) we instead get to 576 TOPS as the available compute total, or 288 TOPS per core.... which also happens to be 2x the combined compute of both cores on HW3.
(and yes I'm aware technically Moores law is transistor count, but it has effectively worked for the sort of thing I'm discussing outside that period for x86 CPUs where Intel sat for 5+ years not doing anything useful)