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HW4 computer mass production in Q4 2021

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It’s certainly possible. The thing I’m hung up on though is the 25 chips per wafer. This just makes no sense. Even if you use the largest common die size it’s still 125 per wafer.

If 25 chips is accurate then each chip would be several thousand dollars in part cost and require 500w of power. No way that would be for FSD or MCU.

Only explanation is typo or translation issue.

The 25 chips per wafer also threw me off, at first I thought it must certainly be Dojo or even maybe SpaceX phased array antenna chips. I could be totally wrong, but the other thing that would be strange about this chip being used for Dojo is that the chip is going into mass production. Why would they mass produce Dojo? Maybe there is a good reason but that seems extremely expensive.
The wafer process is high yield for InFO_SoW, 16nm, so defect rates are low and it serves more as a PCB to which chips are bonded instead of a large chip with many transistors, so the power requirements should not be high. At least, this is my understanding, but I'm not a chip expert.
 
I could be totally wrong, but the other thing that would be strange about this chip being used for Dojo is that the chip is going into mass production. Why would they mass produce Dojo? Maybe there is a good reason but that seems extremely expensive.

My understanding is that Dojo is not a single computer. Dojo is a supercomputer made up of hundreds, if not, thousands of chips running in parallel. So they would indeed need to mass produce a lot of these chips for Dojo.
 
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TL;DR -- each chip will be 5-10x the transistor count than the NVIDIA A100, plus be transistor level optimised for FP32 operations... and Tesla have ordered thousands. Dojo will outperform the combined compute power of every single NVIDIA AI chip in operation across all the compute clouds globally. This is why Tesla needs to build Dojo as the alternative would be to take the entire public cloud compute and Amazon or Google etc wouldn't want this.

An A100 from NVIDIA has approx ~100 TF32 tera-op/s capacity. Elon has stated he wants a useful exaflop which would be million times higher.

what are you talking about... a server isn't made up of one chip and dojo isn't one chip..
and you do realize a Google TPU 4.0 pod is 300+ petaflops
 
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Elon says Dojo 1.0 is about 1 year away still.

5lEPuXd.png
 
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Where are you getting your wafer costs from? My understanding is the same as yours, but my info is more than 10+ years old.
Cost per wafer:
  1. $400 The Macroeconomics of 450mm Wafers | SEMI
  2. $6K Costs for Sub-20nm Wafers put Another Nail in Moore’s Law’s Coffin
  3. $1,382 https://anysilicon.com/major-pure-play-foundries-revenue-per-wafer-2017-2018/

Basing this on 64x yield for an A100 NVIDIA. Each A100 chip is around $12,000 wholesale. Therefore a ~20 die yield on a 300mm wafer would be outrageously inefficient on a chip cost basis.

Either the article had a typo or its a datacenter ML training chip ... no other way around it imo
 
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Basing this on 64x yield for an A100 NVIDIA. Each A100 chip is around $12,000 wholesale. Therefore a ~20 die yield on a 300mm wafer would be outrageously inefficient on a chip cost basis.

Either the article had a typo or its a datacenter ML training chip ... no other way around it imo

The misunderstanding here, from what I can tell, is this is SoW 12-inch wafers. SoW is not a silicon wafer. It's a packaging technology. It's a composite 12-inch (or whatever) wafer composed of a bunch of layers put together. In one of those layers there are (small!) silicon chips (from a 7nm process presumably).

Here's the link (I think it might have been posted earlier):

IFTLE 454: TSMC Exhibits Packaging Prowess at Virtual ECTC 2020 - 3D InCites

TSMC to Build Supercomputing AI Chips, Ramps Wafer-Scale Computing - ExtremeTech

The key point is this:

Screen Shot 2020-09-05 at 7.49.46 PM.png



Again, they build the HW 4 (or whatever) on a 7nm process (or whatever) and then laser cut the die, and then place into the SoW composite. Then they cut up that composite into individual units.

That's my understanding anyway. Now, these examples above are to some extent aimed at supercomputing setups where there is actually connectivity between the different units on the wafer. But that's not a necessity or a requirement to use SoW, and presumably in Tesla's case they just cut out the individual units and then they'd have individual HW 4s. There might well be only 20 or whatever per SoW wafer. But this technology, as complicated as it may be, is a lot cheaper than the per wafer cost of 7nm silicon!

I could be wrong about this, but just a brief perusal of the original article and the technology leads me to this conclusion - and it's not all that unusual.


Anyway, should I wait on upgrading my HW2.5 until HW4 is available? Lol. I paid for FSD while it was on sale (yeah, I folded; I own Tesla stock so I was like "whatevs"). Haven't heard anything from Tesla of course.

My main reason for getting FSD was that I'm hoping for incremental improvements in NoA. I'm hoping it will be able to steer around corners (on the freeway, for example high and low speed interchanges - NOT city streets of course) and be generally usable and able to drive in the simplest of conditions without acting dumb. Not getting that with HW2.5, that's for sure.
 
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The misunderstanding here, from what I can tell, is this is SoW 12-inch wafers. SoW is not a silicon wafer. It's a packaging technology. It's a composite 12-inch (or whatever) wafer composed of a bunch of layers put together. In one of those layers there are (small!) silicon chips (from a 7nm process presumably).

I think you might be onto something here. Wafer --> SoW --> Die. The translation may be missing that middle step and causing the confusion.
 
I think you might be onto something here. Wafer --> SoW --> Die. The translation may be missing that middle step and causing the confusion.

I can certainly guarantee you that there are far more than 20 die on the 12-inch 7nm wafer! Far, far more. The provided information so far does not allow a cost estimate. We would need to know the die size, which is completely unknown.
 
Per TSMC, CoWoS is Chip-on-Wafer-on-Substrate. The "chip" there typically is consists of multiple silicons or multiple dies of different sources. The "wafer" is an interposer, aka an RDL (redistribution layer), or a miniature single-or-multiple-layer PCB made with semiconductor process to provide only interconnects for the dies above it, and the interposer's manufacturing cost is rather cheap. The "substrate" is considered as part of the final package.

Below two illustrations show a wafer (where you get about 30 CoWs), and one CoW before putting on a package substrate. Those 25 chips in electrek means 25 CoWs. Hope this helps.

upload_2020-9-13_13-56-39.png


upload_2020-9-13_14-6-54.png
 

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I have been saying it all along the features labelled as FSD are the things that are listed on website. They are creating precedent with the old hardware 2.0 guys who bought FSD, back when it actually said they would get full autonomy, are getting stuck with paying for a hardware upgrade to make it work. I know it is an unpopular opinion but I expect people with FSD will get what is listed on the purchase page and future upgrades, closer to full autonomy, will cost money.
 
with the old hardware 2.0 guys who bought FSD, back when it actually said they would get full autonomy, are getting stuck with paying for a hardware upgrade to make it work.

This is off topic for this thread...but...

I am unfamiliar with this path. What were these people *exactly* promised, and who is being made to pay for the upgrade? Which people, with which promise, exactly?

I would think that Tesla is on the hook for a settlement if they don’t deliver the (expansive) promises to early Model 3 drivers (and others?). What is the precedent exactly for people paying for hardware upgrades?

In any case, HW3 will allegedly be able to deliver on the promise. We will see! HW4 exists for a reason, of course, and I doubt it is to save power (though presumably it will be more efficient per computation).
 
This is off topic for this thread...but...

I am unfamiliar with this path. What were these people *exactly* promised, and who is being made to pay for the upgrade? Which people, with which promise, exactly?

I would think that Tesla is on the hook for a settlement if they don’t deliver the (expansive) promises to early Model 3 drivers (and others?). What is the precedent exactly for people paying for hardware upgrades?

In any case, HW3 will allegedly be able to deliver on the promise. We will see! HW4 exists for a reason, of course, and I doubt it is to save power (though presumably it will be more efficient per computation).
People who purchased this are required to pay for their MCU to be updated before they can get HW3. Note, People who buy Full Self Driving get far less aggressive verbiage in what they are getting.
 

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