This chip is used on the BMU cards in MS packs, one card per module or "brick" (e.g. 6s74p in the S85). "The bq76PL536A is intended to be used with a host controller to maximize the functionality of the battery management system. However, the protection functions do not require a host controller." There are 48 Memory and One-Time Programmable EPROM (OTPE) I/O registers used to store configuration and control parameters used by the IC to provide the monitoring, balancing and protection functions, which are separate functions remarkably independent from each other. Protection: Comparator circuits with built-in hysteresis and time-delay filtering are used for fault protection. The cell over voltage threshold to trigger OV Fault is stored in OTPE register 0x42 where each binary increment adds 50 mV and the setting ranges from 2.0 to 5.0 V. The hex value for 4.15V is 0x2B, 4.2 V is 0x2C. The cell under voltage threshold to trigger UV fault is stored in the OTPE register 0x44 ranges from 0.7 to 3.3 V in 100 mV increments. Balancing: "The bq76PL536A has six dedicated outputs (CB1...CB6) that can be used to control external N-FETs as part of a cell balancing system. The implementation of appropriate algorithms is controlled by the system host." The cell balance control register 0x32 is R/W from a host controller to toggle the state of the cell balance outputs. The cell balancing timing register is held in memory 0x33 and sets maximum balancing time from 0 to 63 minutes. Monitoring: An onboard 14-bit ADC measures cell voltages with resolution of ~378 uV and accuracy of +/- 1 mV, and the ‘brick’ voltage with resolution of ~1.831 mV and accuracy of -30 mV. These voltages are stored in memory registers 0x01 thru 0x0E and can be read by the host controller. Configuration and Control: A shadow_control register at 0x3A allows the host to write values to use for OV and UV other than the OTPE values.