Hynix EMMC in MCU1s has 3000 rated nand erase cycles (at least that's what Tesla uses as the baseline). Recently they started to gather this usage statistics and show the undocumented command to use it so now rooted users actually do know what their overwrite count is. e.g. on my car it's at 989 right now.
NAND flash doesn't really work with a global rated erase cycle. It works by block. Block size will vary depending on the type of flash (from 1kB to 256 typically).
With NAND you can't change a bit from 0 to 1. When you format a block, all bits are set to 1 (0xFF all over the block). After that you can change them from 1 to 0 (hence the name NAND).
If you want to modify a single byte on a block, you must format it fully and then write it again with the correct value.
Well before the rated erase cycle, formatting a block becomes slower and slower. That's why those memories becomes slower over time. It's not due to the read or write speed, it's the format time that increases.
Why Tesla chose a eMMC with only 3000 erase cycles is beyond me, Intel 15 years ago already had some with 100,000 rated cycle (we used that in HP calculators).
My guess is that the hardware guys who designed the board never conceived that the software dude would want to write everything logs produced, even the useless ones.
Source: have written many NAND drivers in earlier days.